Clock drift correction is a subject that comes up from time to time when performing impulse response measurements. This article provides a brief overview of the issue, what it is and how software corrects it.

Clock drift results from using a DAC (to drive the speakers) and ADC (sampling the microphone signal) with independent clocks. The most typical case is when using a USB microphone. The microphone has a built-in ADC and clock to drive the ADC. This clock is independent of the clock in the DAC. While the clocks will be running at a standard sampling rate, say 48000 S/s, they will not be precisely 48000 S/s. Clock oscillator accuracy is specified in parts per million. If the clock in the microphone is 50ppm fast, it'll be running at 48002.4 S/s. Similarly, the clock in the DAC may be running slow by some small amount. If you are using an analogue output microphone with an audio interface with both analogue outputs and inputs, then the DAC and ADC will be driven by the same clock and clock drift will not be an issue.

Consider a difference in the sampling rate of 2 samples per second. If the sine sweep of a single channel takes 5 seconds and two channels are measured over 10 seconds, then there will be a difference of 20 samples. The result is not only an error in the measurement of the relative timing of the two channels but also an error in phase measurement resulting in a distorted impulse response.

The solution employed in the industry and employed by Focus Fidelity is to measure the first channel, then the second channel and then the first channel again. This is done as one continuous recording. If the clocks are running at precisely the same sample rates, then the two measurements of the first channel will also be identical. However, if the clocks run at different sampling rates, then the software can compare, with very high precision, the timing of the two measurements. Then, a correction is applied based on this timing difference.

The following example shows the measured impulse response of a simple test setup. The DAC output is connected directly to the ADC input. The sampling clocks are from a laboratory signal generator allowing precision setting of a desired and controlled difference, in this example, 200ppm at 48000 S/s.

The measured step response on the left is without clock drift compensation, on the right, with clock drift compensation applied,

It is worth noting that a difference of 200ppm is high but is used for example purposes here.